Hi, I’m a 4th year EECS Ph.D. student at UCI Corsa Lab working with Prof. Sitao Huang. I also work closely with Prof. Hyoukjun Kwon. My research focus is AI for system design and hardware-software co-design accelerators.

Update

[7/24/26] Served as AE program committe for MICRO 2026 and IISWC 2026

[7/17/26] One paper “Structure-augmented LLMs for High-Level Synthesis Pragma Optimization” has been accepted to MLCAD’26

[6/22/26] Served as a program committe for AAAI 2027

[6/15/26] Returned to HPE Labs as a System Architecture Lab Intern

[4/29/26] A poster has been accepted to Amazon Research Day 2026

[4/13/26] Served as a judge for FCCM RCC 2026

[3/15/26] Served as a judge for UROP Symposium

[3/8/26] Served as AE program committe for ISPASS 2026

[2/23/26] One paper “Characterizing State Space Model and Hybrid Language Model Performance with Long Context” has been accepted to ISPASS’26

[2/18/26] A poster has been accepted to Agent4Chip Workshop

[2/8/26] Served as a program committee for 2026 IEEE/ACM International Conference on Codesign of Embedded Systems (CODES)

[10/24/25] A poster has beena accepted to IBM AI Compute Symposium 2025

[9/13/25] Continued as a part-time Research Intern with HPE Labs

[8/12/25] Served as a program committe for AAAI 26

[7/14/25] Served as a program committe for 23rd International Conference on Hardware/Software Codesign and System Synthesis(CODES+ISSS 2025)

[6/23/25] Joined HPE Labs as System Architecture Lab Intern

[4/18/25] Served as Artifact Evaluation Committee for OSDI 2025

[3/11/25] Two papers “RSEND: Retinex-based Squeeze and Excitation Network with Dark Region Detection for Efficient Low Light Image Enhancement” and “MONAS: Efficient zero-shot neural architecture search for MCUs” have been accepted to IJCNN’25

[6/22/24] Received LAD’24 Student Travel Grant

[5/10/24] One paper “Optimizing High-Level Synthesis Designs with Retrieval-Augmented Large Language Models” has been accepected to LAD’24

[5/2/24] Recived Best Student Poster Award for “Optimized Spatial Architecture Mapping Flow for Transformer Accelerators” at the IAP UCI Workshop on the Future of AI and Cloud Computing Applications and Infrastructure

[4/28/24] Joined OSDI/ATC 2024 Artifact Evaluation Committee (AEC)

[4/26/24] Received MLSys’24 Student Travel Grant

[4/15/24] One poster has been accepted to MLSys’24 Young Professionals Symposium

[4/15/24] I will join MediaTek as AI Architecture and Algorithm Intern this Summer 2024

[4/7/24] Received DAC Young Fellow 2024

[12/16/23] One paper “HyperDetect: A Real-Time Hyperdimensional Solution For Intrusion Detection in IoT Networks” has been acceptected to IEEE Internet of Things Journal

[11/12/23] “MicroNAS: Zero-Shot Neural Architecture Search for MCUs” has been accepted to DATE’24 as extended abstract